Buck converter calculator

How this is calculated

A buck converter connects the inductor to the input for part of each cycle and to ground for the rest, and the inductor averages the result. In the steady state the current in an inductor returns to where it started every cycle, so the volt-seconds it gains while the switch is on must equal the volt-seconds it loses while the switch is off:

D · V_on = (1 − D) · V_off

Every calculator turns that into D = V_out / V_in and stops. That is the answer for a converter built out of perfect parts. The real one has an on-resistance in each switch and a winding resistance in the inductor, and those drops do not cancel — the high-side resistance subtracts from V_on while the low-side resistance and the DCR add to V_off. Solving with them in gives

D = [ V_out + I · (R_low + DCR) ] / [ V_in + I · (R_low − R_high) ]

which matters in two places. Near dropout it decides whether the converter regulates at all: the lowest input this stage can work from is V_out + I · (R_high + DCR), and the duty cycle climbs towards 1 as you approach it. At the other end, a large step-down ratio makes the on-time very short, and every controller has a minimum on-time below which it cannot go without skipping pulses — dropping 48 V to 3.3 V at 500 kHz leaves about 140 ns, which is already close to that floor for many parts.

The ripple ratio is the only thing you get to choose

Once the input, the output, the load and the frequency are fixed, the power stage has exactly one free parameter. You can express it as the inductance, but the meaningful form is the ripple ratio — the peak-to-peak inductor ripple as a fraction of the load current:

r = ΔI / I_out    L = V_off · (1 − D) / (r · I_out · f)

Inductance and ripple are reciprocal, so halving the inductor is exactly doubling the ripple. What almost nobody states is that the things this moves do not move together, and the asymmetry is enormous. Output ripple voltage scales with r. The output capacitor's RMS current, ΔI/√12, scales with r. But the inductor's own RMS current is

I_rms = I_out · √(1 + r²/12)

and that square makes it almost flat: at r = 0.3 the coil carries 0.37 % more RMS current than the DC load, and at r = 0.6 it carries 1.5 %. Conduction loss follows the square of that, so it is a fraction of a percent either way.

Put numbers on it. At the defaults, going from r = 0.3 to r = 0.6 takes the inductor from 8.2 µH to 3.9 µH — a genuinely smaller, cheaper, lower-profile part — and doubles the output ripple, doubles the output capacitor's RMS duty, and costs 0.08 percentage points of efficiency. Going the other way, from 0.3 to 0.15, doubles the inductance to buy back 0.02 points. That is the whole trade, and it is why the folk figure of “30 %” is not a law: on a design limited by inductor height, r = 0.5 costs almost nothing, and on one whose output has to be quiet, r = 0.15 is cheap in everything except board area.

There is one hard limit at the upper end. The ripple is centred on the load current, so the valley is I_out − ΔI/2, and at r = 2 that reaches zero. Past it the inductor current hits zero every cycle and the converter is in discontinuous conduction, where the output voltage no longer depends on duty cycle alone and the control loop behaves differently. That is not a failure — plenty of designs run discontinuous on purpose at light load — but it is a different circuit, and r = 2 is where it starts.

Peak current is what the inductor has to survive

An inductor is not rated by the current it carries on average. It has a saturation current, above which the core stops storing flux proportionally and the inductance collapses — and when inductance collapses the ripple grows, which raises the peak, which saturates it harder. The current that matters is therefore

I_peak = I_out · (1 + r/2)

Choose a part whose saturation rating is above that with margin, and remember that the peak the page reports is the steady-state one: at start-up, during a load step, and at the controller's current limit the inductor sees more. The other rating on the datasheet, usually called the RMS or heating current, is what the RMS figure is compared against, and those two numbers are almost never equal — a part rated 3 A RMS may saturate at 3.6 A or at 8 A depending entirely on the core material. A ferrite core saturates abruptly; a powdered-iron one rolls off gradually, which is more forgiving and also means it has no single honest saturation number.

Output ripple is usually an ESR problem, and one number decides it

The ripple current has to go somewhere, and the output capacitor takes all of it. It produces two separate voltages: the charge sloshing in and out moves the capacitor's own voltage, and the same current crossing the equivalent series resistance produces a voltage directly.

ΔV_C = ΔI / (8 f C)    ΔV_ESR = ΔI · ESR

Divide one by the other and the ripple current cancels:

ΔV_ESR / ΔV_C = 8 · f · C · ESR

Which of the two dominates has nothing to do with the inductor, the load or the ripple current. It is decided by the capacitor and the frequency alone, before you have chosen anything else — and since f·C·ESR is the capacitor's own time constant measured in switching periods, the rule is simply that a capacitor whose ESR time constant exceeds an eighth of the period is an ESR-dominated capacitor. At the defaults, a good 100 µF ceramic bank at 10 mΩ and 500 kHz, the ratio is 4: the ESR term is four times the capacitance term even there. Put a 100 mΩ electrolytic in its place and the ratio is 40, and the millivolt and a half the capacitance contributes disappears beside 60 mV of ESR ripple.

This is why solving for capacitance from a ripple specification — which is what most calculators do — so often produces a number that changes nothing when you build it. Ten times the capacitance at the same ESR buys a tenth of a term that was already negligible. The page reports both terms and adds them, which is the conservative answer: the two peak at slightly different instants, so the true peak-to-peak is somewhere between the larger term alone and the sum. Inductance in the capacitor and its mounting is not included, and it is what dominates the narrow spikes you see on a scope — a layout problem rather than a component one.

The same L and C are also a second-order low-pass filter, and its corner — an ordinary LC resonance at 1/(2π√LC) — is what the control loop has to cross. The page reports it beside the ripple, because a corner too close to the switching frequency leaves no room for a stable loop.

The input capacitor is the one people under-rate

The output of a buck converter is fed by an inductor, so the current leaving it is smooth. The input is fed by a switch, so the current entering it is a rectangular pulse: the full inductor current for the on-time, and nothing at all for the rest. Every amp of that chopping has to come from the input capacitor, because the wiring upstream cannot supply a square wave.

I_Cin(rms) ≈ I_out · √(D · (1 − D))

which peaks at exactly half the load current when the duty cycle is 50 %. At the defaults it is 0.91 A, while the output capacitor over the same cycle sees ΔI/√12, which is 0.17 A. The input capacitor carries more than five times the RMS current of the output capacitor, and it is routinely the smaller of the two on the board. Ripple-current rating, not capacitance, is what it is chosen for; an undersized one runs hot, ages, loses capacitance and takes the converter with it. The page prints the slightly fuller expression, which also counts the inductor ripple inside the pulse, but the √(D(1−D)) form is the one worth keeping in your head.

Where the loss goes, and what it becomes

Six terms account for almost all of it. The two switches conduct for their share of the cycle and dissipate I_rms²R each; the inductor's winding conducts the whole time; the high-side switch loses roughly ½V_inI(t_r+t_f)f every cycle crossing between on and off; the gate driver throws away Q_gV_drivef charging and discharging gates; and the controller draws its quiescent current from the input regardless.

The shape of that list is the useful part. Three of the six terms scale with the switching frequency and three do not, which is the real reason frequency is a design decision rather than a preference: at the defaults, switching loss alone is the largest single item, and running at 250 kHz would halve it — at the price of twice the inductance for the same ripple. And at light load the frequency-proportional terms stay exactly where they are while the output power falls away, which is why the efficiency curve above collapses at the left-hand end, and why datasheet efficiency plots always use a logarithmic current axis.

Whatever the total comes to, it leaves as heat in three or four small packages, and it is worth checking where: half a watt spread across a board is nothing, half a watt in one diode is a thermal question with a real answer. That is the main argument against the catch-diode version — at the defaults a Schottky dropping 0.45 V for most of the cycle dissipates more on its own than the entire synchronous stage loses, and it is the reason a modern buck has a second transistor there instead. If the converter runs from a cell rather than a wall supply, the efficiency figure here is the number that belongs in the battery life calculator, where it sets how much charge the load actually costs.

Two things the board decides rather than the maths. The loop carrying that chopped input current should be physically tiny, because it is the main radiator on the converter; and the copper carrying the output current has to be sized for it — the PCB trace width calculator takes the same current and the same voltage-drop budget. The feedback network that sets the output voltage is an ordinary voltage divider, and its source resistance matters for the same reason it does anywhere else: the feedback pin is the most sensitive node on the converter, and a high-impedance divider beside a switching node is an antenna.

FAQ

What inductor value do I need for a buck converter?

Whatever gives the ripple ratio you want: L = V_off(1 − D)/(r I_out f), where V_off is the output voltage plus the drops in the low-side path. There is no single right answer, which is the point of this page — the ratio is a choice about size against capacitor duty, not a fact about the circuit. Anything between about 0.2 and 0.6 is ordinary; below 0.15 you are buying a large inductor for very little, and above 1 the peak current starts to make the inductor expensive again.

Why is my duty cycle not just V_out / V_in?

Because the switches and the winding drop voltage, and the drops in the on-path and the off-path do not cancel. The converter has to stay on slightly longer to make up for what it loses, so the real duty cycle always exceeds the ideal ratio, by roughly the fractional loss in the stage. At low output voltages and high currents it can be much more than a rounding error, and it is what sets the dropout limit.

What is continuous and discontinuous conduction mode?

In continuous conduction the inductor current never reaches zero, so one of the two switches is always carrying it and the output voltage depends only on the duty cycle. In discontinuous conduction the current hits zero part way through the off-time and stays there, and the output then depends on load and inductance as well. The boundary is a load current of exactly ΔI/2, which for a fixed inductor barely changes with load — so a converter designed for 30 % ripple at 2 A goes discontinuous below about 0.3 A, and this page prints that figure and marks it on the efficiency curve.

How do I choose the switching frequency?

Higher frequency means a proportionally smaller inductor and capacitor, and proportionally more switching and gate loss. Since the magnetics shrink linearly while those losses grow linearly, the decision is usually made by whichever of size or efficiency is the binding constraint, then trimmed by what the controller offers. Above a megahertz the inductor's core loss and the switch's transition loss start to dominate everything else; below about 100 kHz the passives get large and the ripple starts to land in the audio band.

Synchronous MOSFET or catch diode?

Synchronous, for anything above a few hundred milliamps. A diode drops a fixed voltage for the whole off-time, so its loss is proportional to current and to (1 − D), and it gets worse as the output voltage falls — the very case where a buck is most useful. A low-side MOSFET drops I·R instead, which is far smaller at any current a modern part is used at. The diode is still the right answer when the load is tiny, when the cost of a second gate driver matters, or when it is only there to catch the current during dead time.

Does this include the control loop?

No. Everything here is the power stage in the steady state: what the parts carry, what they dissipate, and what the output ripple is with the converter regulating. Compensation, transient response and stability depend on the controller's architecture and on the output filter's corner, which the page reports. A design that is right here can still oscillate, and a design that is wrong here cannot be rescued by compensation.

Why is my measured ripple much worse than this?

Usually the probe, then the layout. A ground lead on an oscilloscope probe forms a loop that picks up the switching edges directly and can show tens of millivolts that are not present on the board; measuring across the capacitor's own terminals with a short tip is a different reading entirely. After that it is the capacitor's inductance and the path to it, which produce narrow spikes at each switch transition rather than the triangular ripple this page calculates. The triangle is what the maths predicts; the spikes are what the layout adds.